ARM® big.LITTLE™ processing is a power-optimization technology where high-performance ARM CPU cores are combined with the most efficient ...
ARM® big.LITTLE™ processing is a power-optimization technology where high-performance ARM CPU cores are combined with the most efficient ARM CPU cores to deliver peak-performance capacity, higher sustained performance, and increased parallel processing performance, at significantly lower average power. The latest big.LITTLE software and platforms can save 75% of CPU energy in low to moderate performance scenarios, and can increase performance by 40% in highly threaded workloads. The underlying big.LITTLE software, big.LITTLE MP, automatically and seamlessly moves workloads to the appropriate CPU core based on performance needs. ARM big.LITTLE technology enables mobile SoCs to be designed for new levels of peak performance, in the same all-day battery life users expect. Background The performance demanded by smartphones and tablets is increasing at a much faster rate than technology improvements in battery capacity and the advances in semiconductor process nodes. The need for higher performance directly conflicts with the desire for longer battery life. The solution to this lies beyond process technology and traditional power management and requires further innovation in mobile SoC design. big.LITTLE is one of many power management technologies employed by ARM to save power in mobile SoCs. It works in tandem with Dynamic Voltage and Frequency Scaling (DVFS), clock gating, power gating, retention modes, and thermal management to deliver a full set of power control for the SoC. big.LITTLE technology takes advantage of the dynamic usage pattern for smartphones and tablets. Periods of high processing intensity tasks such as initial web page rendering and game physics calculation alternate with typically longer periods of low processing intensity tasks such as scrolling or reading a web page, waiting for user input in a game, and lighter weight tasks like texting, e-mail and audio. The graph below (Fig.1) shows the CPU residency at various DVFS frequency states in a big.LITTLE SoC, with all the relevant power management techniques in operation. It shows the usage of the big CPU cores in burst mode (i.e. for short durations at peak frequency) while the majority of runtime is managed by LITTLE cores at moderate operating frequencies.
